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AMD Opteron Ideal for Low-Cost CFD
Posted Thu May 01, 2003 @09:39AM
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Hardware AMD's newly released Opteron CPU has a number of features which make it an ideal CPU for a low-cost multi-processor CFD compute server. Let's take a look at some of the features most useful for CFD computations.

Support for 32-bit and 64-bit operation

Many people are starting to bump against the memory address limitations of 32-bit computing when running large CFD calculations. Moving to 64-bit computing raises the memory address limit from 2^32 (4 gigabytes) to 2^64 (16 exabytes) although it should be noted that the Opteron uses 40-bit physical memory addressing putting the limit at 1 terabyte of physical memory. (An exabyte is 1,000 petabytes, a petabyte is 1,000 terabytes and a terabyte is 1,000 gigabytes.) Such a change will be essential for running next generation CFD problems utilizing millions of grid points.

But many CFD applications (grid generation, for instance) will be fine running in 32-bit address space for some time to come. This is where the Opteron shines because it can run both 32-bit and 64-bit applications natively, whereas the Intel 64-bit processor (the Itanium) uses an emulation layer to run 32-bit applications. The result is good CPU performance in both modes.


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Support for Multi-Processor Servers

With the Opteron, AMD made the interesting choice of including a memory controller on the CPU die. This uncommon design in the PC arena results in substantially better memory latency (less wasted CPU clock cycles waiting for memory). While this makes a single CPU more productive, another design feature makes the Opteron ideal for multi-processor machines. Conventional multi-processor (MP) Intel architectures shared the front side bus (FSB) - the bus that connects the CPUs to the rest of the system. The problem with this design is that adding processors reduces the memory bandwidth available to each processor.

With the Athlon, AMD designers gave each processor its own 64-bit connection to the rest of the system - a first for PCs. The design offered much better performance but was expensive to implement and difficult to scale (AMD never built a 4-way Athlon MP chipset).

The Opteron uses a different strategy. Each Opteron CPU features 3 Hyper Transport links (a point-to-point bus pioneered by AMD), two of which can be used to connect with another Opteron CPU at 6.4 GB/s of bandwidth per link. The two features above combine to provide excellent multi-processor performance. Because each CPU has its own memory controller, each CPU has direct access to its own local memory. And, because each CPU can connect to other CPUs over the Hyper Transport link, the CPU can pull data from other memory controllers in a multi-processor machine. The result is a memory system that scales very well with number of CPUs in a system.

This type of memory access is known as NUMA (Non-Uniform Memory Access) and to be effective requires support from the operating system. Windows 2003 Server, in Enterprise and Datacenter editions, supports NUMA. Linux support for NUMA is under development.

There is also the possibility of AMD manufacturing multi-core Opteron CPUs, that is, two processors on the same die. Such a chip would be much more efficient than two separate CPUs.

Conclusion

With real world performance tests just coming in, it is too early to say just how strong the Opteron processor will be. However, the choices AMD has made with the design of this CPU seem tailor made for a low-cost multi-processor CFD compute machine.

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